Graduate Design Engineer

Graduate Design Engineer Application Deadline: 25 September 2026 Department: Hardware Employment Type: Full Time Location: Southampton, UK Reporting To: Tom Hollis Description AccelerComm attracts people who want to work on the cutting edge 5G/6G satellite communications that are powering global connectivity - technology that is genuinely advanced and problems that are genuinely hard. Our engineering team combines experienced industry experts with talented graduates from leading universities.

Together we are highly collaborative, innovative, delivery-focused, and committed to developing world-class IP blocks for FPGA and ASIC solutions. We are now seeking talented and motivated Graduate Design Engineers to join our Hardware Design team. These roles offer an excellent opportunity to work alongside experienced engineers on the development of advanced digital signal processing and communications IP.

The ideal candidates will have a strong academic background in Electronic Engineering, Computer Engineering, Communications Engineering, or a related discipline, together with exposure to RTL design using languages such as Verilog, SystemVerilog, or VHDL. An interest in wireless communications, digital design, and hardware verification is highly desirable. These are hands-on engineering roles that provide exposure across the full hardware development lifecycle.

The team works closely with system architects, algorithm designers, software engineers, and implementation teams to transform complex requirements into high-performance silicon and FPGA solutions. Digital design and verification are at the heart of our development work and we used a broad range of design, verification, and debugging techniques, to ensure that the hardware IP we deliver is reliable and efficient.

We are running a selection event at our Southampton offices on Wednesday 7 October and applicants will need to be available to attend in person if shortlisted. Key Responsibilities · Contribute to the design, implementation, verification, and delivery of high-performance digital hardware IP for wireless communication systems. · Develop RTL designs using SystemVerilog, Verilog, or VHDL, targeting FPGA and ASIC technologies.

· Support the development and verification of communications signal processing functions and hardware architectures. · Collaborate with hardware, algorithm, software, and systems engineers to translate system requirements into efficient hardware implementations. · Develop and maintain testbenches, simulation environments, and verification infrastructure. · Support the creation of automated engineering workflows, build systems, and development tools using scripting languages such as Python and Bash.

· Produce clear and accurate technical documentation covering design specifications, implementation details, and verification results. · Follow established engineering processes, coding standards, and design methodologies to ensure the delivery of high-quality IP. · Participate in design reviews, technical discussions, and knowledge-sharing activities within the engineering team. · Continuously develop technical expertise across multiple areas of digital hardware and wireless communications engineering.

Skills, Knowledge & Expertise Essential · Bachelor's or Master's degree in Electronic Engineering, Computer Engineering, Communications Engineering, Physics, Mathematics, or a related technical discipline. · Understanding of digital design fundamentals, including combinational and sequential logic, finite state machines, timing concepts, and digital architectures. · Exposure to hardware description languages such as Verilog, SystemVerilog, or VHDL through academic projects, placements, internships, or personal projects.

· Basic knowledge of at least one scripting language, such as Python, MATLAB, Tcl, or Bash. · Strong analytical, problem-solving, and debugging skills. · Ability to communicate technical concepts clearly through written reports and verbal pr