Job at a glance
Principal RF IC Design Engineer IV Location: San Jose, CA (Hybrid) Contract to Hire Pay: $75-78/ HR We are seeking a highly experienced Principal RF IC Design Engineer to join an innovative semiconductor engineering team focused on the design and development of high-performance RF and analog integrated circuits. This is a hands-on technical leadership opportunity for an engineer who enjoys taking complex IC designs from architecture and transistor-level design through simulation, silicon validation, and mass production.
What You’ll Do Lead the design and development of high-performance RF and analog IC circuits from transistor level through block and module level. Develop circuit architectures and perform simulation, optimization, and verification. Partner with layout engineers to guide and review RF and analog IC layout. Develop test plans and work closely with testing and validation teams. Evaluate silicon performance, reliability, and production yield.
Analyze simulation-to-bench and bench-to-test correlation. Perform silicon-level and application-level circuit evaluation and troubleshooting. Support successful tape-outs, design releases, and transition to mass production. Collaborate with cross-functional and geographically distributed engineering teams. Document designs, simulations, test results, and technical findings. Provide technical leadership and contribute to innovative circuit solutions.
What We’re Looking For Hands-on experience designing and developing RF and analog integrated circuits. Strong experience with full-CMOS circuit design and development. Experience in one or more of the following areas: Baseband, low-noise RF, or wide-bandwidth amplifiers, Mixers, up-converters, or down-converters. High-speed drivers and receivers, CDR circuits and equalizers. And/or Power amplifiers Experience with 40nm or smaller CMOS technologies.
Demonstrated experience taking IC designs through tape-out/design release and mass production. Proficiency with industry-standard EDA tools such as Cadence, Mentor/Siemens, Ansys, or similar platforms. Strong understanding of RF and analog circuit design principles. Excellent written and verbal communication skills. Nice to Have Experience with RF and high-performance analog layout, including LNAs, mixers, ADCs, DACs, and related analog blocks.
Experience with floor planning, block-level routing, and top-level chip routing. Knowledge of analog layout considerations such as matching, EM/IR, SOA, and mitigation techniques. Experience collaborating with distributed engineering teams. Demonstrated track record of circuit innovation and technical leadership. Education & Experience BSEE: 10 years of relevant experience MSEE: 8 years of relevant experience PhD: 4 years of relevant experience Please submit your resume in Word or PDF format to be considered