Staff SoC Integration and Performance Lead

Job DescriptionPassionate about integrating Complex SoC RTL and enabling early performance analysis?Eager to expand into boot firmware, workload bring-up, emulation and system-level performance analysis?Arm's System-on-Chip(SoC) Performance Analysis Team in Central Technology group builds early Performance analysis platforms to enable system technology exploration for future Arm System/SoC architectures.

Through workload characterization, RTL simulation, emulation and performance analysis, we influence future SoC designs.We are seeking a highly skilled and motivated Staff SoC RTL integration and Performance Analysis engineer to join our diverse team at Arm! Responsibilities: As a SoC RTL integration and Performance Analysis Engineer, you will:Lead integration of functionally verified, performance-critical Arm IP into SoC-level RTL platforms for Performance analysisModify and stitch together RTL components to build and evaluate multiple SoC configurations and architecture variants.Bring up SoC platforms in RTL simulation and emulation environments for early performance exploration.Make incremental changes to system-level firmware to enable boot flow, workload execution, and test-case bring-up.Verify SoC functionality using bare-metal tests, benchmark workloads, and OS boot flows.Enable and debug performance workloads and benchmarks on RTL simulation and emulation platforms.Analyze performance behavior across CPU, interconnect, memory subsystem, and key SoC IP blocks.Collaborate with architects to define, evaluate, and refine future SoC architecture choices.Drive debug of integration, firmware, workload, and performance issues across multi-disciplinary teams.Explore innovative approaches for SoC integration, automation, tooling, and workflow improvement.Provide technical leadership, mentorship, and guidance to junior engineers and cross-functional partners.

Required Skills and ExperienceStrong understanding of computer architecture, SoC architecture, memory subsystems, and bus/interconnect protocols.Hands-on experience integrating IP and bringing up full-chip SoC test cases in RTL simulation and/or emulation environments.Experience developing or modifying RTL using Verilog or SystemVerilog.Experience with SoC-level debug, including reset, clock, memory map, interrupt, interconnect, and firmware interactions.Experience enabling workloads, benchmarks, or bare-metal tests on RTL simulation and performance emulation platforms.Ability to analyze performance data and identify bottlenecks across SoC components.Strong problem-solving skills and ability to debug complex hardware/software interaction issues.Excellent communication, collaboration, and stakeholder-management skills.Proactive mindset with the ability to lead technical execution in ambiguous or evolving project environments.Nice-to-Have Skills and ExperienceProficiency with Unix/Linux environments, scripting languages, and source-control systems such as Git or Subversion.Familiarity with Arm architecture and one or more CPU instruction sets.Experience with boot firmware, low-level software, compilers, assemblers, or device drivers.Experience with performance workloads such as SPEC, Geekbench, multimedia, memory bandwidth, or latency benchmarks.Familiarity with emulation platforms, FPGA prototyping, or performance-analysis infrastructure.Experience with AMBA protocols such as AXI, ACE, CHI, APB, or related interconnect technologies.Experience with system-level performance analysis involving CPU, cache, interconnect, memory controller, SMMU, or multimedia IP.Experience developing automation, regression, dashboards, or debug workflows for large SoC projects.In Return:We will provide the training and environment to excel in this role.

We offer a hybrid approach to remote, and office working and strive to provide an adaptable experience for all employees and to promote a strong collaborative environment.Arm is an equal opportunity employer, committed to providing an environment of