Job at a glance
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward.
Join us and, together, we’ll advance your career. As an AMD intern and co-op, you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next.
JOB DETAILS: Location: San Jose, CA or Santa Clara,CA Onsite/Hybrid: This role requires the student to work full time (40 hours a week), in either a hybrid or onsite work structure throughout the duration of the co-op/intern term Duration: Spring/Summer Co-op : January 25, 2027 - August 13, 2027 Summer Internship: Semester Students: May 24, 2027 - August 13, 2027 Quarter Students: June 21, 2027 - September 10, 2027 Summer/Fall Co-op : Semester Students: May 24, 2027 - December 10, 2027 Quarter Students: June 21, 2027 - December 10, 2027 WHAT YOU WILL BE DOING: We are seeking highly motivated ML System Engineering co-op to join our team.
In this role – We will give you your own project: taking an LLM or VLM and making it run faster on the Ryzen AI NPU. You will start by studying where the time and memory actually go, then propose what to change. We will train you to write and tune AIE kernels with IRON, so you can optimize the operators that dominate LLM runtime — GEMM, attention, normalization, and activation functions. You get to present your findings to the wider engineering organization at the end of your term, and write up what you learned so the team can build on it.
What you will learn: how a transformer maps onto a tiled dataflow accelerator, how to reason about compute-bound versus memory-bound behavior on real hardware, and how production AI compilers and runtimes are structured. You will be paired with a mentor who reviews your work weekly. WHO WE ARE LOOKING FOR: You are completing a PhD, in Computer Science, Computer Engineering, or Electrical Engineering.
You know LLM and VLM architectures well — attention, KV cache, prefill versus decode, and vision encoder fusion. You have worked with compilers: graph lowering, operator fusion, scheduling, tiling, and memory planning. MLIR experience is a plus. You are strong in Python and C++, and comfortable profiling code to tell compute-bound from memory-bound behavior. Familiarity with the AMD AI Engine (AIE) architecture, or experience writing kernels or dataflow designs with IRON, is a plus.
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