Post Silicon High-Speed I/O Validation Engineer
Job at a glance
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward.
Join us and, together, we’ll advance your career. THE ROLE: We are looking for a dynamic, energetic, and visionary Senior Technical Validation Engineer to join our growing datacenter CPU post silicon validation team, in particular in the areas of highspeed IO such as inter-die interface UCIe, UALink, PCI Express and Compute Express Link (CXL), multi-socket interfaces. THE PERSON: As a senior member of the technical staff, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market.
The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. KEY RESPONSIBILITIES: Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products for High-Speed IO Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup) Test interactions between various SoC features using validation infrastructure Debug and drive root-cause analysis for SoC related issues Collaborate with cross-functional teams in developing tools to improve SoC validation and debug Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process Lead internal task forces, workgroups as well as participation in industry consortium PREFERRED EXPERIENCE: Proven leadership experience in soc design or validation Has experience in UCIe, UALink, PCIe Gen5/6+, CXL, UCIe or proprietary inter-die and multi-socket server interface in either electrical or functional or both.
Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired Experience developing validation methodologies and infrastructure Test plan and workload development experience Participated in silicon bring up and debug, support to internal engineering teams Able to execute and drive success of programs with multiple projects on the go Debug skills at both SoC and system level Familiarity with programming / scripting language (C/C++, Python, Perl, ...) Working knowledge of Server OSes (Linux, Windows) <span style="font-size: 12pt; font-family: aria